The present invention relates to a dropper-type DC stabilized power supply circuit in which a power transistor is provided in series with a power supply line connecting a DC power source and a DC load so that an output voltage is stabilized by controlling a base current of the power transistor, and especially pertains to an improvement of the responsiveness of the output voltage when stabilizing the voltage.
FIG. 8 is a block diagram illustrating an electric structure of a typical dropper-type DC stabilized power supply circuit 1 of conventional art. This DC stabilized power supply circuit 1 is generally arranged such that an output capacitor c is externally attached to a circuit chip 2 of a semiconductor, and a power transistor q is provided in series with a power source line 3 between an input terminal p1 connected to a DC power source so as to receive an input voltage Vin and an output terminal p2 connected to a DC load so as to output an output voltage Vo. The base current of the power transistor q is controlled by a base drive circuit composed of a control transistor tr, etc.
The output voltage Vo is divided by voltage dividing resistors r1 and r2 so that a divided voltage value Vadj is generated, and the divided voltage value Vadj and an external reference voltage Vref, the latter complying with a band gap voltage, are supplied to a difference amplifier a. The voltages Vadj and Vref are compared with each other by the difference amplifier a, and the difference between the voltages is amplified so as to be sent to the base of the control transistor tr. Also, the control transistor tr controls the base current of the power transistor q and hence the output voltage Vo is kept at a constant value. Between the base and the emitter of the power transistor q, a bias resistor r3 is provided, whereas to the emitter of the control transistor tr, a current restraining resistor r4 is connected. These resistors r3 and r4 constitute the above-identified base drive circuit.
Because of the arrangement above, when, for instance, a load current Io is increased so that the output voltage Vo is lowered below an predetermined output voltage Vc, in other words, when the divided voltage value Vadj is lowered below an external reference voltage Vref, the difference amplifier a and the base drive circuit let a base current Id of the power transistor q flow so as to turn the power transistor q on, so that the output voltage Vo is increased. On the contrary, when a load current Io is decreased so that the output voltage Vo is increased above the predetermined output voltage Vc, the difference amplifier a and the base drive circuit stop a base current Id of the power transistor q so as to turn the power transistor q off, so that the output voltage Vo is decreased. On this account, the output voltage Vo is controlled to be equal with the predetermined output voltage Vc.
The output capacitor c is provided so as to stabilize the output voltage Vo. The impedance of the output capacitor c is represented by 1/jxcfx89c. The frequency characteristics of the output capacitor c is, for instance, arranged as illustrated in FIG. 10, and on account of the output capacitor c, the impedance in high-frequency band is reduced.
The DC stabilized power supply circuit 1 as arranged above causes a problem such that when a phase compensation capacity of the difference amplifier a is enlarged to stabilize the output voltage Vo, the response of the feedback system is slowed down and the output voltage Vo greatly varies in accordance with the variation of the load. As illustrated in FIG. 9, for instance, when the load is decreased, i.e. the load current Io is decreased, the power transistor q is not promptly cut off and thus the output voltage Vo becomes much greater than the predetermined output voltage Vc. In this case, the output voltage Vo is out of control until the electrical charge charged in the output capacitor c is discharged at an impedance of the output from the output capacitor c. On the contrary, when the load is increased, i.e. the load current is increased, the output voltage Vo becomes much smaller than the predetermined voltage Vc.
Therefore, especially when the output capacitor c has small capacity and ESR (Equivalent Series Resistance), an overshoot of the output voltage Vo is conspicuous under light load so that the output voltage Vo is unstable, and hence the output voltage Vo oscillates so as to show a triangular waveform as illustrated in FIG. 11. Thus to stabilize the output voltage Vo, the capacity of the output capacity c has to be large.
Moreover, when the gain of the difference amplifier a is increased, the output voltage Vo tends to be oscillated. This tendency is prominent especially when the capacity of the output capacitor c is decreased. In the meantime, when the gain of the difference amplifier a is decreased, the output voltage Vo hardly keeps up with a rapid variation of the load, so that the gain of the difference amplifier a cannot be varied much.
Since devices such as mobile devices have rapidly adopted a surface mounting technology and have become miniaturized, the DC stabilized power supply circuit has also adopted the surface mounting technology and have become miniaturized, and along with this tendency, a surface-mounted/chip-type output capacitor c has frequently been used therein and miniaturization of the capacitor has eagerly been attempted. However, for stabilizing the output voltage Vo, there is still a case that an output capacitor c, which is larger than the circuit chip 2, is adopted as things stand now.
The present invention aims at providing a DC stabilized power supply circuit which is capable of supplying a stable output voltage with an output capacitor having small capacity.
To achieve the above-identified aim, the DC stabilized power supply circuit in accordance with the present invention includes: a power transistor connected in series with a power supply line; a first difference amplifier in which an output voltage is stabilized by controlling a base current of said power transistor according to a difference between a feedback value of said output voltage and a predetermined first reference voltage so that said feedback value and said first reference voltage are equal to each other; a second difference amplifier in which a second reference voltage greater than said first reference voltage by a predetermined level is set, and the greater said feedback value of the output voltage is than said second reference voltage, the more said base current of the power transistor is restrained; and a third difference amplifier in which a third reference voltage smaller than said first reference voltage by a predetermined level is set, and the smaller said feedback value of the output voltage is than said third reference voltage, the more a gain of said first difference amplifier is increased.
According to this arrangement, the dropper-type DC stabilized power supply circuit is additionally provided with the second and third difference amplifiers which operate in parallel with the first difference amplifier and set reference voltages respectively greater and smaller than the first reference voltage of the first difference amplifier which controls the base current of the power transistor, by a predetermined level. When the output voltage is greater than a value in accordance with the second reference voltage, the second difference amplifier restrains the base current of the power transistor so as to shorten the period during which the power transistor is turned off, and consequently the output voltage promptly decreases. On the contrary, when the output voltage is smaller than a value in accordance with the third reference voltage, the third difference amplifier increases the gain of the first difference amplifier so as to shorten the period during which the power transistor is turned on, and consequently the output voltage promptly increases.
Thus, it is possible to further stabilize the output voltage and reduce the capacity of the output capacitor.
Moreover, the DC stabilized power supply circuit in accordance with the present invention generates, as described above, the second reference voltage of the second difference amplifier and the third reference voltage of the third difference amplifier, using a band gap voltage.
Thus, even if the external reference voltage is commonly applied to the second and third difference amplifiers as well as the first difference amplifier, it is possible to set the second and third reference voltages by simply using input offset voltages generated due to the variation of the emitter areas of the transistors of the differential pairs of the second and third difference amplifiers.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.